A 1.2V 62.2dB SNDR SAR-Assisted Event-Driven Clockless Level-Crossing ADC for Time-Sparse Signal Acquisition-Reference-Cited by-同舟云学术

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A 1.2V 62.2dB SNDR SAR-Assisted Event-Driven Clockless Level-Crossing ADC for Time-Sparse Signal Acquisition

Published:2023-09-11 Issue: Volume: Page:
ISSN:
Container-title:ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC)
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Author:

Li Mengyu¹,Song Shuang¹,Qu Wanyuan¹,Ye Le²,Zhao Menglian¹,Tan Zhichao¹

Affiliation:

1. Zhejiang University,HangZhou,China

2. Peking University,Beijing,China

Funder

National Natural Science Foundation of China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10268677/10268683/10268821.pdf?arnumber=10268821

Reference9 articles.

1. The impact of the MIT-BIH Arrhythmia Database

2. An Event-Driven Quasi-Level-Crossing Delta Modulator Based on Residue Quantization

3. A 1.9nJ/b 2.4GHz multistandard (Bluetooth Low Energy/Zigbee/IEEE802.15.6) transceiver for personal/body-area networks

4. A 10.4-ENOB 0.92-5.38 μW Event-Driven Level-Crossing ADC with Adaptive Clocking for Time-Sparse Edge Applications

5. An Event-driven Clockless Level-Crossing ADC With Signal-Dependent Adaptive Resolution

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Analysis and Design of a 10.4-ENOB 0.92–5.38-μW Event-Driven Level-Crossing ADC With Adaptive Clocking for Time-Sparse Edge Applications;IEEE Journal of Solid-State Circuits;2024-09

2. A 0.49–4.34 μW LC-SAR Hybrid ADC with a 10.85-Bit ENOB and 20 KS/s Bandwidth;Electronics;2024-03-14

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