True Voltage-Mode NRZ VCSEL Transmitter enabling 60 Gbit/s at 0.37 pJ/bit in 22 nm FDSOI
Author:
Affiliation:
1. TU Berlin, FG Mixed Signal Circuit Design, Einsteinufer 17,Berlin,Germany,10587
2. Vertically Integrated Systems GmbH (VIS), Hardenbergstraße 7,Berlin,Germany,10623
Funder
Deutsche Forschungsgemeinschaft
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10268677/10268683/10268797.pdf?arnumber=10268797
Reference7 articles.
1. A compact electrooptical VCSEL model for high-speed IC design;belfiore;in 2016 12th Conference on Ph D Research in Microelectronics and Electronics (PRIME),2016
2. A 42 Gbps VCSEL driver with adjustable 2-tap feed-forward equalizer in 14 nm SOI CMOS
3. Up to 600 Gbit/s data transmission over 100 m of single multi-mode fiber using 4×λ 850-940 nm VCSELs
4. Non-Linear PAM-4 VCSEL Equalization and 22 nm SOI CMOS DAC for 112 Gbit/s Data Transmission
5. A 35-Gb/s 0.65-pJ/b Asymmetric Push-Pull Inverter-Based VCSEL Driver With Series Inductive Peaking in 65-nm CMOS
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1. A Low-Power High-BW PAM4 VCSEL Driver With Three-Tap FFE in 12-nm CMOS FinFET Process;IEEE Journal of Solid-State Circuits;2024-07
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