FP-IMC: A 28nm All-Digital Configurable Floating-Point In-Memory Computing Macro-Reference-Cited by-同舟云学术

FP-IMC: A 28nm All-Digital Configurable Floating-Point In-Memory Computing Macro

Published:2023-09-11 Issue: Volume: Page:
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Container-title:ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC)
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Author:

Saikia Jyotishman¹,Sridharan Amitesh¹,Yeo Injune¹,Venkataramanaiah Shreyas¹,Fan Deliang¹,Seo Jae-Sun¹

Affiliation:

1. Arizona State University,School of Electrical, Computer and Energy Engineering,Tempe,AZ,USA

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10268677/10268683/10268770.pdf?arnumber=10268770

Reference9 articles.

1. A 28nm 64-kb 31.6-TFLOPS/W Digital-Domain Floating-Point-Computing-Unit and Double-Bit 6T-SRAM Computing-in-Memory Macro for Floating-Point CNNs

2. A 22nm 832Kb hybrid-domain floating-point SRAM in- memory-compute macro with 16.2-70.2 TFLOPS/W for high-accuracy AI-edge devices;wu;IEEE ISSCC,2023

3. Fast: DNN training under variable precision block floating point with stochastic rounding;zhang;IEEE HPCA,2022

4. A 177 TOPS/W, Capacitor-based In-Memory Computing SRAM Macro with Stepwise-Charging/Discharging DACs and Sparsity-Optimized Bitcells for 4-Bit Deep Convolutional Neural Networks

5. An 89 TOPS/W and 16.3 TOPS/mm2 all-digital SRAM-based full-precision compute-in memory macro in 22nm for machine-learning edge applications;chih;IEEE ISSCC,2021

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1. SLAM-CIM: A Visual SLAM Backend Processor With Dynamic-Range-Driven-Skipping Linear-Solving FP-CIM Macros;IEEE Journal of Solid-State Circuits;2024