Author:
Dimitrakopoulos G.,Nikolos D.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software
Cited by
71 articles.
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1. A 32-Bit Ripple-Ling Hybrid Carry Adder;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-06
2. Area Efficient Sparse-4 Diminished-1 Modulo 2n + 1 Adder;2024 IEEE Wireless Antenna and Microwave Symposium (WAMS);2024-02-29
3. Synthesis of Approximate Parallel-Prefix Adders;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-11
4. A Variable Latency Ling Adder Based on Brent-Kung Parallel-Prefix Topology;2023 IEEE 23rd International Conference on Nanotechnology (NANO);2023-07-02
5. Path-Based Delay Variation Models for Parallel-Prefix Adders;IEEE Transactions on Emerging Topics in Computing;2023-07-01