1. A 12-b 18-GS/s RF Sampling ADC With an Integrated Wideband Track-and-Hold Amplifier and Background Calibration
2. An Auxiliary-Channel-Sharing Background Distortion and Gain Calibration Achieving >8 dB SFDR Improvement over 4th Nyquist Zone in 1GS/s ADC;wei;IEEE Symp VLSI Circuits,2021
3. A 2.1 mW 11b 410 MS/s Dynamic Pipelined SAR ADC with Background Calibration in 28nm Digital CMOS;verbruggen;IEEE Symp VLSI Circuits,2013
4. A 1.67-GSps TI 10-Bit Ping-Pong SAR ADC With 51-dB SNDR in 16-nm FinFET
5. A 38-mW 7-bit 5-GS/s Time-Interleaved SAR ADC with Background Skew Calibration