Analysis on Program Disturbance in Channel-Stacked NAND Flash Memory With Layer Selection by Multilevel Operation-Reference-Cited by-同舟云学术

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Analysis on Program Disturbance in Channel-Stacked NAND Flash Memory With Layer Selection by Multilevel Operation

Published:2016-03 Issue:3 Volume:63 Page:1041-1046
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Kwon Dae Woong,Kim Wandong,Kim Do-Bin,Lee Sang-Ho,Seo Joo Yun,Baek Myung-Hyun,Park Ji-Ho,Choi Eunseok,Cho Gyu Seong,Park Sung-Kye,Lee Jong-Ho,Park Byung-Gook

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/16/7419296/7419335.pdf?arnumber=7419335

Cited by 15 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. High-density 3D-NAND flash with dual-string select line (D-SSL);Engineering Research Express;2024-08-20

2. Bidirectional Precharge and Negative Bias Scheme for Program Disturbance Suppression in 3-D NAND Flash Memory;IEEE Transactions on Electron Devices;2023-12

3. Edge Word-Line Reliability Problem in 3-D NAND Flash Memory: Observations, Analysis, and Solutions;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-06

4. A Review of Cell Operation Algorithm for 3D NAND Flash Memory;Applied Sciences;2022-10-22

5. Investigation of Vth Distribution Tails of Ground-Select-Line Cells and Edge Dummy Cells in a 3-D NAND Flash Memory;IEEE Transactions on Electron Devices;2021-05

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