Author:
Kaczmarek Bartosz,Mrugalski Grzegorz,Mukherjee Nilanjan,Rajski Janusz,Rybak Lukasz,Tyszer Jerzy
Cited by
6 articles.
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1. Bit-Complemented Test Data to Replace the Tail of a Fault Coverage Curve;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-04
2. Reduced On-chip Storage of Seeds for Built-in Test Generation;ACM Transactions on Design Automation of Electronic Systems;2024-03-14
3. Storage-Based Logic Built-In Self-Test With Cyclic Tests;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-09
4. Storage-Based Logic Built-In Self-Test With Partitioned Deterministic Compressed Tests;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-09
5. Storage and Counter Based Logic Built-In Self-Test;IEEE Access;2023