A 4.0 μm Stacked Digital Pixel Sensor Operating in a Dual Quantization Mode for High Dynamic Range
Author:
Affiliation:
1. Brillnics Japan Inc., Tokyo, Japan
2. Brillnics Inc., Zhubei, Taiwan
3. Reality Labs Research, Meta Inc., Redmond, WA, USA
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/16/9780469/09762367.pdf?arnumber=9762367
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4. Automotive 8.3 MP CMOS Image Sensor with 150 dB Dynamic Range and Light Flicker Mitigation
5. A 1280–960 2.8 ?m HDR CIS with DCG and split-pixel combined;solhusvik;Proc Int Image Sensor Workshop (IISW),2019
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1. A 3.96μm, 124dB Dynamic Range, 6.2mW Stacked Digital Pixel Sensor with Monochrome and Near-Infrared Dual-Channel Global Shutter Capture;2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits);2023-06-11
2. Two ramp reference voltages CDS scheme applied to low noise and high dynamic range PWM pixel;Microelectronics Journal;2023-05
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