Modeling and Analysis of PBTI, and HCD in Presence of Self-Heating in GAA-SNS NFETs
Author:
Affiliation:
1. Department of Electrical Engineering, Indian Institute of Technology Bombay (IIT Bombay), Mumbai, India
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/16/9967813/09940916.pdf?arnumber=9940916
Reference19 articles.
1. Channel Hot-Carrier degradation under static stress in short channel transistors with high-k/metal gate stacks
2. A Review of Hot Carrier Degradation in n-Channel MOSFETs—Part I: Physical Mechanism
3. A Review of Hot Carrier Degradation in n-Channel MOSFETs—Part II: Technology Scaling
4. A Review of Self-Heating Effects in Advanced CMOS Technologies
5. A Method to Isolate Intrinsic HCD and NBTI Contributions Under Self Heating During Varying VG/VD Stress in GAA Nanosheet PFETs
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3. Impact of Lightly Doped Drain on Hot Carrier Degradation Variability in N-FETs and SRAM Cells;2024 IEEE International Reliability Physics Symposium (IRPS);2024-04-14
4. A TCAD to SPICE Framework for Isolation of BTI and HCD in GAA-SNS FETs and to Estimate Impact on RO Under Normal and Overclocking Conditions;2024 IEEE International Reliability Physics Symposium (IRPS);2024-04-14
5. A Device to Circuit Reliability Framework for BTI and HCD Aging;2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM);2024-03-03
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