Research on A Chiplet-based DSA (Domain-Specific Architectures) Scalable Convolutional Acceleration Architecture-Reference-Cited by-同舟云学术

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Research on A Chiplet-based DSA (Domain-Specific Architectures) Scalable Convolutional Acceleration Architecture

Published:2022-08-10 Issue: Volume: Page:
ISSN:
Container-title:2022 23rd International Conference on Electronic Packaging Technology (ICEPT)
language:
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Author:

Zhu Shiliang¹,Miao Min²,Zhang Zhuanzhuan¹,Duan Xiaolong¹

Affiliation:

1. Ministry of Information Industry Beijing Information Science and Technology University,Key Laboratory of Information and Communication Systems,Beijing,China

2. Beijing Information Science and Technology University,Key Laboratory of the Ministry of Education for Optoelectronic Measurement Technology and Instrument,Beijing,China,100101

Funder

National Natural Science Foundation of China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9872527/9872536/09873177.pdf?arnumber=9873177

Reference8 articles.

1. Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse

2. Reconfigurable Instruction-Based Multicore Parallel Convolution and Its Application in Real-Time Template Matching

3. High Performance Dynamic Resource Allocation for Guaranteed Service in Network-on-Chips

4. DNN pruning and mapping on NoC-Based communication infrastructure

5. Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures

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