Characterization and Simulation of Interfacial Adhesion in Embedded Device Package
Author:
Affiliation:
1. University of Chinese Academy of Sciences,Institute of Microelectronics of Chinese, Academy of Sciences,Beijing,China
2. Academy of Sciences,Institute of Microelectronics of Chinese,Beijing,China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9872527/9872536/09872614.pdf?arnumber=9872614
Reference8 articles.
1. Chip-packaging interaction: a critical concern for Cu/low k packaging
2. Impact of flip-chip packaging on copper/low-k structures
3. Three dimensional corner delamination analysis for fan-out chip scale package;chen;2008 International Conference on Electronic Packaging Technology & High Density Packaging,2008
4. Hygrothermal Failures From Small Defects in Lead-Free Solder Reflowed Electronic Packages
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