Advantages of All-Copper Interconnects in SiC MOSFET Packaging: Effective Reduction of Spurious Parameters-Reference-Cited by-同舟云学术

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Advantages of All-Copper Interconnects in SiC MOSFET Packaging: Effective Reduction of Spurious Parameters

Published:2022-08-10 Issue: Volume: Page:
ISSN:
Container-title:2022 23rd International Conference on Electronic Packaging Technology (ICEPT)
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Author:

Jiang Jing¹,Gao Chenshan²,Zhang Guoqi³,Li Yuhong²,Song Guanqiang²,Fan Jiajie³,Ye Huaiyu⁴

Affiliation:

1. Sky Chip Interconnection Technology co., LTD,Shenzhen,China

2. Sky Chip Interconnection Technology co., LTD,Product Research and Development,Shenzhen,China

3. Fudan University,Academy for Engineering & Technology,Shanghai,China

4. Southern University of Science and Technology,Chongqing University,Shenzhen,China

Funder

Shenzhen Fundamental Research Program

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9872527/9872536/09873133.pdf?arnumber=9873133

Reference6 articles.

1. An Overview of Wide Bandgap Power Semiconductor Device Packaging Techniques for EMI Reduction

2. Wide Bandgap Semiconductors

3. Record-low 10m? SiC MOSFETs in TO-247, rated at 900V;pala;2016 IEEE Applied Power Electronics Conference and Exposition (APEC),0

4. Study on thermal stability of all copper interconnect structures under thermal shock

5. InP HEMT integrated circuits operating above 1,000 GHz

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