Impact and compensation of dead time on common mode voltage elimination modulation for neutral-point-clamped three-phase inverters

Author:

Zhang Xuning,Boroyevich Dushan,Burgos Rolando,Mattavelli Paolo,Wang Fred

Publisher

IEEE

Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Adaptive Common-Mode Voltage Reduction Technique for Three Level NPC Inverters;2024 International Conference on Advancements in Power, Communication and Intelligent Systems (APCI);2024-06-21

2. Impact of Dead Time Effect on Common Mode Electromagnetic Interference in PMSM Drives;2024 IEEE Joint International Symposium on Electromagnetic Compatibility, Signal & Power Integrity: EMC Japan / Asia-Pacific International Symposium on Electromagnetic Compatibility (EMC Japan/APEMC Okinawa);2024-05-20

3. Optimal Pulse Width Modulation of Three-Level Converters With Reduced Common-Mode Voltage;IEEE Transactions on Industry Applications;2024-05

4. EMI Modeling Method and Active Suppression Technology of Common-Mode Electromagnetic Interference in Three-Phase Two-Level Inverter Based on Four-Bridge Topology;IEEE Transactions on Industry Applications;2024-05

5. Common-Mode Voltage in Three-Level T-Type Inverter: Modeling, Analysis, and Compensation;2024 IEEE Applied Power Electronics Conference and Exposition (APEC);2024-02-25

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