A Novel Self-Aligned Offset-Gated Polysilicon TFT Using High-<tex>$kappa$</tex>Dielectric Spacers-Reference-Cited by-同舟云学术

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A Novel Self-Aligned Offset-Gated Polysilicon TFT Using High-<tex>$kappa$</tex>Dielectric Spacers

Published:2004-04 Issue:4 Volume:25 Page:194-195
ISSN:0741-3106
Container-title:IEEE Electron Device Letters
language:en
Short-container-title:IEEE Electron Device Lett.

Author:

Xiong Z.,Liu H.,Zhu C.,Sin J.K.O.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx5/55/28586/01278553.pdf?arnumber=1278553

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3. Microcrystalline-Si thin-film transistors formed by using palladium silicided source/drain contact electrode;Solid-State Electronics;2010-12

4. Reduction of Off-State Currents in Silicon on Glass Thin Film Transistor by Off-State Bias Stress;Electrochemical and Solid-State Letters;2010

5. Reduction of Leakage Currents in Bottom-Gate N-Channel Metal-Induced Crystallization through a Cap Layer Polycrystalline Silicon Thin-Film Transistors by Applying Off-Bias Stress;Japanese Journal of Applied Physics;2009-08-20

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