An Efficient Hardware Implementation of TimSort and MergeSort Algorithms Using High Level Synthesis-Reference-Cited by-同舟云学术

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An Efficient Hardware Implementation of TimSort and MergeSort Algorithms Using High Level Synthesis

Published:2017-07 Issue: Volume: Page:
ISSN:
Container-title:2017 International Conference on High Performance Computing & Simulation (HPCS)
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Author:

Jmaa Yomna Ben,Ali Karim M. A.,Duvivier David,Jemaa Maher Ben,Atitallah Rabie Ben

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8030510/8035032/08035131.pdf?arnumber=8035131

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Accelerate Implementation of Timsort Algorithm Using CUDA;2023 26th International Conference on Computer and Information Technology (ICCIT);2023-12-13

2. An Acceleration Method of Data Table Parsing and Database Sorting Based on Mask Calculation;2023 China Automation Congress (CAC);2023-11-17

3. ARM vs FPGA: Comparative Analysis of Sorting Algorithms;Advanced Information Networking and Applications;2022

4. Sorting Algorithms on ARM Cortex A9 Processor;Advanced Information Networking and Applications;2021

5. A Comparative Study of Sorting Algorithms with FPGA Acceleration by High Level Synthesis;Computación y Sistemas;2019-03-30

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