Development of a Fast and Energy-Efficient Carrier Bypass Adder with Tunable Delay Extension Using the Han Carlson Adder-Reference-Cited by-同舟云学术

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Development of a Fast and Energy-Efficient Carrier Bypass Adder with Tunable Delay Extension Using the Han Carlson Adder

Published:2024-06-28 Issue: Volume:48 Page:1-4
ISSN:
Container-title:2024 IEEE International Conference on Information Technology, Electronics and Intelligent Communication Systems (ICITEICS)
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Author:

Shyamsundar B.¹,Venkateswara R.¹,Kumar H. Pavan¹,Kumar H. Shree¹

Affiliation:

1. Madanapalli Institute Of Technology And Science,Electronics And Communication Engineering,Madanapalle,Andhra Pradesh,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx8/10624684/10624740/10625150.pdf?arnumber=10625150

Reference20 articles.

1. High-speed VLSI arithmetic using carry-skip adders;Han;IEEE Transactions on Computers,1999

2. Energy-efficient carry-skip adder with reduced glitch power;Wang;IEEE Transactions on Very LargeScale Integration (VLSI) Systems,2015

3. A novel design of carry- skip adder with reduced area and power consumption;Liu;Microelectronics Journal,2013

4. Configurable delay extension technique for high-performance carry- skip adders;Khalid

5. Design and analysis of lowpower carry-skip adder using transmission gate;Hasan

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