Author:
Schneider P.H.,Krishnamoorthy S.
Cited by
9 articles.
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1. GRILAPE: Graph Representation Inductive Learning-based Average Power Estimation for Frontend ASIC RTL Designs;2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID);2023-01
2. A secure and highly efficient first-order masking scheme for AES linear operations;Cybersecurity;2021-06-02
3. RTL to Transistor Level Power Modeling and Estimation Techniques for FPGA and ASIC: A Survey;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2021-03
4. Decomposition-Based Vectorless Toggle Rate Computation for FPGA Circuits;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2010-11
5. Fast toggle rate computation for FPGA circuits;2008 International Conference on Field Programmable Logic and Applications;2008