Modeling and Validation of an Isolated NMOS Transistor in a 0.25 μm SiGe-C BiCMOS Process-Reference-Cited by-同舟云学术

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Modeling and Validation of an Isolated NMOS Transistor in a 0.25 μm SiGe-C BiCMOS Process

Published:2023-12-04 Issue: Volume: Page:1-4
ISSN:
Container-title:2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
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Author:

Cagdas Engin¹,Aniktar Huseyin¹,Tunbak M. Emin¹,Fenercioglu Volkan¹,Arikan S. Ebru¹,Caliskan A. Ulvi¹

Affiliation:

1. Tübitak Bilgem Yital,Semiconductor Technologies Research Laboratory,Kocaeli,Turkey

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10382705/10382711/10382848.pdf?arnumber=10382848

Reference7 articles.

1. PSP model website

2. PSP: An Advanced Surface-Potential-Based MOSFET Model for Circuit Simulation

3. Distortion Simulations with the PSP Model: Common-Gate Circuits

4. Accuracy of PSP and BSIM4 models in determination of IP3 compression point

5. Pathwave Device Modeling (IC-CAP) Modeling Handbook

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