Evaluation of Bipolar Degradation in SiC MOSFETs for Converter Design
Author:
Affiliation:
1. University of Warwick,School of Engineering,Coventry,UK
2. Chongqing University,School of Electrical Engineering,Chongqing,China
3. CRRC Times Electric,Zhuzhou,China
4. Offshore Renewable Energy Catapult,Blyth,UK
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10361838/10361943/10362409.pdf?arnumber=10362409
Reference7 articles.
1. Comparative Optimization Design of a Modular Multilevel Converter Tapping Cells and a 2L-VSC for Hybrid LV ac/dc Microgrids
2. Fundamentals of Silicon Carbide Technology
3. Understanding and reduction of degradation phenomena in SiC power devices
4. Modeling of Bipolar Degradations in 4H-SiC Power MOSFET Devices by a 3C-SiC Inclusive Layer Consideration in the Drift Region
5. Modeling and Evaluation of Stacking Fault Expansion Velocity in Body Diodes of 3.3 kV SiC MOSFET
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