Mechanical and Thermal Characterization of TSV Multi-chip Stacked Packages for Reliable 3D IC Applications
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Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/7542794/7545393/07545456.pdf?arnumber=7545456
Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. 2.5D MCM (Multi-chip Module) Technology Development for Advanced Package;2023 IEEE 73rd Electronic Components and Technology Conference (ECTC);2023-05
2. Temperature Estimation of HBM2 Channels with Tail Distribution of Retention Errors in FPGA-HBM2 Platform;Electronics;2022-12-22
3. The Investigation of Electrical Characteristics for Carbon Nano-Tubes as Through Silicon Via in Multi-Layer Stacking Scheme With an Optimized Structure;IEEE Transactions on Electron Devices;2022-09
4. Sample Preparation for Deprocessing of 3D Multi-Die Stacked Package;2020 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA);2020-07-20
5. Recent Advances in Thermal Metamaterials and Their Future Applications for Electronics Packaging;Journal of Electronic Packaging;2020-06-29
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