Author:
Bian Haodong,Huang Jianqiang,Dong Runting,Liu Lingbin,Wang Xiaoying
Cited by
14 articles.
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1. CAMLB-SpMV: An Efficient Cache-Aware Memory Load-Balancing SpMV on CPU;Proceedings of the 53rd International Conference on Parallel Processing;2024-08-12
2. VNEC: A Vectorized Non-Empty Column Format for SpMV on CPUs;2024 IEEE International Parallel and Distributed Processing Symposium (IPDPS);2024-05-27
3. Optimal Scheduling for the Performance Optimization of SpMV Computation using Machine Learning Techniques;2024 7th International Conference on Information and Computer Technologies (ICICT);2024-03-15
4. Adaptive Lossy Data Compression Extended Architecture for Memory Bandwidth Conservation in SpMV;IEICE Transactions on Information and Systems;2023-12-01
5. Accelerating SpMV on FPGAs Through Block-Row Compress: A Task-Based Approach;2023 33rd International Conference on Field-Programmable Logic and Applications (FPL);2023-09-04