Analysis of Parasitic Stored Energy Loss and PCB Layout Optimization for 48V-to-1V Series-Capacitor Buck-Reference-Cited by-同舟云学术

Analysis of Parasitic Stored Energy Loss and PCB Layout Optimization for 48V-to-1V Series-Capacitor Buck

Published:2024-02-25 Issue: Volume: Page:898-905
ISSN:
Container-title:2024 IEEE Applied Power Electronics Conference and Exposition (APEC)
language:
Short-container-title:

Author:

Xu Xinmiao¹,Li Qiang¹

Affiliation:

1. Virginia Polytechnic Institute and State University,Center for Power Electronics Systems,Department of Electrical and Computer Engineering,Blacksburg,VA,United States,24061

Funder

Infineon Technologies

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10509012/10509018/10509096.pdf?arnumber=10509096

Reference17 articles.

1. United states data center energy usage report;Shehabi,2016

2. Energy-efficient cloud computing technologies and policies for an eco-friendly cloud market. final study report;Montevecchi,2020

3. A 2400 W/in3 1.8 V Bus Converter for Vertical Power Delivery to Next-Generation Systems-on-Chip;Prakash

4. Ultra-Low-Profile Twisted Core Inductor for Vertical Power Delivery Voltage Regulator

5. Non-isolated power conversion system having multiple switching power converters;Jang,2006

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Ultra-Low-Profile Twisted Core Inductor for Vertical Power Delivery Voltage Regulator;2024 IEEE Applied Power Electronics Conference and Exposition (APEC);2024-02-25

2. A 2400 W/in³ 1.8 V Bus Converter Enabling Vertical Power Delivery for Next-Generation Processors;2024 IEEE Applied Power Electronics Conference and Exposition (APEC);2024-02-25