1. SRIL: Securing Registers from Information Leakage at Register Transfer Level;2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID);2024-01-06
2. Towards HW-SW Co-Design for Secure Industrial Real-Time Ethernet Applications;2023 IEEE 28th International Conference on Emerging Technologies and Factory Automation (ETFA);2023-09-12
3. An End-to-End Video Content Encryption Module for HLS Video Streaming;Advances in Systems Analysis, Software Engineering, and High Performance Computing;2022
4. System on Chip Design with Vivado High-Level Synthesis Tool;2019 11th International Conference on Electrical and Electronics Engineering (ELECO);2019-11
5. HLS-Based Performance and Resource Optimization of Cryptographic Modules;2018 IEEE Intl Conf on Parallel & Distributed Processing with Applications, Ubiquitous Computing & Communications, Big Data & Cloud Computing, Social Computing & Networking, Sustainable Computing & Communications (ISPA/IUCC/BDCloud/SocialCom/SustainCom);2018-12