A 500-Mbps Digital Isolator Circuits using Counter-Pulse Immune Receiver Scheme for Power Electronics-Reference-Cited by-同舟云学术

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A 500-Mbps Digital Isolator Circuits using Counter-Pulse Immune Receiver Scheme for Power Electronics

Published:2019-06 Issue: Volume: Page:
ISSN:
Container-title:2019 International Conference on IC Design and Technology (ICICDT)
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Author:

Kagaya Tsukasa,Miyazaki Koutaro,Takamiya Makoto,Sakurai Takayasu

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8784132/8790825/08790941.pdf?arnumber=8790941

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Ultra-High-Isolation Mutual-Embedded Transformer in Organic Substrate for Digital Isolator;IEEE Electron Device Letters;2024-04

2. Low-Delay High-CMTI Digital Isolator Based on Set-Reset Modulation Technique Used in IGBT Drivers;2024 4th International Conference on Neural Networks, Information and Communication (NNICE);2024-01-19

3. Digital Isolator Based on On-Chip Transformer for High-Voltage SiC MOSFET;2023 IEEE 7th Conference on Energy Internet and Energy System Integration (EI2);2023-12-15

4. Design of Capacitive Digital Isolation Chip;2023 4th International Conference on Power Engineering (ICPE);2023-12-11

5. A capacitively coupled digital isolator with CMTI of 160 kV/μs and data rate of 230 Mbps;Microelectronics Journal;2023-09

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