Low-power high-speed level shifter design for block-level dynamic voltage scaling environment-Reference-Cited by-同舟云学术

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Low-power high-speed level shifter design for block-level dynamic voltage scaling environment

Published:2005 Issue: Volume: Page:
ISSN:
Container-title:2005 International Conference on Integrated Circuit Design and Technology, 2005. ICICDT 2005.
language:
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Author:

Tran C.Q.,Kawaguchi H.,Sakurai T.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/10047/32240/01502637.pdf?arnumber=1502637

Cited by 42 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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