Author:
Ren Xiaowei,Lustig Daniel,Bolotin Evgeny,Jaleel Aamer,Villa Oreste,Nellans David
Cited by
19 articles.
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1. Barre Chord: Efficient Virtual Memory Translation for Multi-Chip-Module GPUs;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29
2. Supporting Secure Multi-GPU Computing with Dynamic and Batched Metadata Management;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02
3. Turn-based Spatiotemporal Coherence for GPUs;ACM Transactions on Architecture and Code Optimization;2023-07-19
4. SAC: Sharing-Aware Caching in Multi-Chip GPUs;Proceedings of the 50th Annual International Symposium on Computer Architecture;2023-06-17
5. FinePack: Transparently Improving the Efficiency of Fine-Grained Transfers in Multi-GPU Systems;2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2023-02