Analog/RF Performance Evaluation of InAs-InGaAs-GAA-TFET-Reference-Cited by-同舟云学术

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Analog/RF Performance Evaluation of InAs-InGaAs-GAA-TFET

Published:2023-04-19 Issue: Volume: Page:
ISSN:
Container-title:2023 International Conference on Recent Advances in Electrical, Electronics, Ubiquitous Communication, and Computational Intelligence (RAEEUCCI)
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Author:

Saravanan M¹^ORCID,Parthasarathy Eswaran²^ORCID,Ramkumar K³^ORCID,Ajayan J⁴^ORCID

Affiliation:

1. Sri Eshwar College of Engineering,Electronics and Commuication Engineering,Coimbatore,India

2. SRM Institute of Science and Technology,Electronics and Commuication Engineering,Chennai,India

3. Vellore Institute of Technology,Electronics and Commuication Engineering,Vellore,India

4. SR University,Electronics and Commuication Engineering,Warangal,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10133933/10133939/10134372.pdf?arnumber=10134372

Reference18 articles.

1. Influence of trap carriers in SiO2/HfO2 stacked dielectric cylindrical gate tunnel FET;anand;Silicon,2021

2. Investigation of RF/Analog Performance of InAs/InGaAs Channel Based Nanowire TFETS

3. Investigation of Hetero Buried Oxide and Gate Dielectric PNPN Tunnel Field Effect Transistors;ramkumar;Silicon,2020

4. Electrostatic characteristics of a high-k stacked gate-all-around heterojunction tunnel field-effect transistor using the superposition principle

5. Analytical modelling and simulation of single-gate SOI TFET for low-power applications

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