4.9 A 1ms high-speed vision chip with 3D-stacked 140GOPS column-parallel PEs for spatio-temporal image processing-Reference-Cited by-同舟云学术

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4.9 A 1ms high-speed vision chip with 3D-stacked 140GOPS column-parallel PEs for spatio-temporal image processing

Published:2017-02 Issue: Volume: Page:
ISSN:
Container-title:2017 IEEE International Solid-State Circuits Conference (ISSCC)
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Author:

Yamazaki Tomohiro,Katayama Hironobu,Uehara Shuji,Nose Atsushi,Kobayashi Masatsugu,Shida Sayaka,Odahara Masaki,Takamiya Kenichi,Hisamatsu Yasuaki,Matsumoto Shizunori,Miyashita Leo,Watanabe Yoshihiro,Izawa Takashi,Muramatsu Yoshinori,Ishikawa Masatoshi

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7866667/7870233/07870271.pdf?arnumber=7870271

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