23.3 A 6Gb/s 3-tap FFE transmitter and 5-tap DFE receiver in 65nm/0.18µm CMOS for next-generation 8K displays
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx7/7405163/7417881/7418077.pdf?arnumber=7418077
Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A 0.99-pJ/b 10-Gb/s Receiver With Fast Recovery From Sleep Mode Under Voltage Drift;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-11
2. A clock embedded intra‐panel interface with 1.96% data overhead for beyond 8K displays;Journal of the Society for Information Display;2023-05
3. A 5.2 Gb/s Receiver for Next-Generation 8K Displays in 180 nm CMOS Process;IEEE Journal of Solid-State Circuits;2022-08
4. A 40 nm 16 Gb/s differential transmitter with far-end crosstalk cancellation using injection timing control for high-density flexible flat cables;Analog Integrated Circuits and Signal Processing;2020-09-14
5. A 0.0071-mm2 10.8pspp-Jitter 4 to 10-Gb/s 5-Tap Current-Mode Transmitter Using a Hybrid Delay Line for Sub-1-UI Fractional De-Emphasis;IEEE Transactions on Circuits and Systems I: Regular Papers;2019-10
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