A 7nm FinFET SRAM using EUV lithography with dual write-driver-assist circuitry for low-voltage applications

Author:

Song Taejoong,Jung Jonghoon,Rim Woojin,Kim Hoonki,Kim Yongho,Park Changnam,Do Jeongho,Park Sunghyun,Cho Sungwee,Jung Hyuntaek,Kwon Bongjae,Choi Hyun-Su,Choi JaeSeung,Yoon Jong Shik

Publisher

IEEE

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4. A 3-nm FinFET 27.6-Mbit/mm2 Single-Port 6T SRAM Enabling 0.48–1.2 V Wide Operating Range With Far-End Pre-Charge and Weak-Bit Tracking;IEEE Journal of Solid-State Circuits;2024-04

5. Pattern deformation mitigation for EUV photoresists using wafer backside cleaning techniques;Japanese Journal of Applied Physics;2024-03-01

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