A digital frequency synthesizer with dither-assisted pulling mitigation for simultaneous DCO and reference path coupling
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx7/8304413/8310156/08310280.pdf?arnumber=8310280
Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Canceling Fundamental Fractional Spurs Due to Self-Interference in a Digital Phase-Locked Loop;IEEE Journal of Solid-State Circuits;2024
2. A Fully Integrated Pulling Mitigation Synthesizer for NB-IoT Transmitter;IEEE Transactions on Microwave Theory and Techniques;2023-12
3. Analysis of the Electromagnetic Coupling of Two Phase-Locked Loops;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21
4. A Hybrid Pulling Mitigation Synthesizer for NB-IoT Transmitter;2022 IEEE/MTT-S International Microwave Symposium - IMS 2022;2022-06-19
5. Study of Injection Pulling of Oscillators in Phase-Locked Loops;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2021-02
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