Intermittent resonant clocking enabling power reduction at any clock frequency for 0.37V 980kHz near-threshold logic circuits-Reference-Cited by-同舟云学术

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Intermittent resonant clocking enabling power reduction at any clock frequency for 0.37V 980kHz near-threshold logic circuits

Published:2013-02 Issue: Volume: Page:
ISSN:
Container-title:2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers
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Author:

Fuketa H.,Nomura M.,Takamiya M.,Sakurai T.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6480926/6487590/06487804.pdf?arnumber=6487804

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Quasi-Resonant Clocking: Continuous Voltage-Frequency Scalable Resonant Clocking System for Dynamic Voltage-Frequency Scaling Systems;IEEE Journal of Solid-State Circuits;2018-03

2. Wide operating frequency resonant clock and data circuits for switching power reductions;Analog Integrated Circuits and Signal Processing;2014-11-18

3. Quasi-resonant clocking;Proceedings of the 2014 international symposium on Low power electronics and design;2014-08-11

4. Intermittent Resonant Clocking Enabling Power Reduction at Any Clock Frequency for Near/Sub-Threshold Logic Circuits;IEEE Journal of Solid-State Circuits;2014-02

5. Minimizing Power and Skew in VLSI-SoC Clocking with Pulsed Resonance Driven De-skewing Latches;2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems;2014-01

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