A 2Gpixel/s H.264/AVC HP/MVC video decoder chip for Super Hi-Vision and 3DTV/FTV applications-Reference-Cited by-同舟云学术

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A 2Gpixel/s H.264/AVC HP/MVC video decoder chip for Super Hi-Vision and 3DTV/FTV applications

Published:2012-02 Issue: Volume: Page:
ISSN:
Container-title:2012 IEEE International Solid-State Circuits Conference
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Author:

Zhou Dajiang,Zhou Jinjia,Zhu Jiayi,Liu Peilin,Goto Satoshi

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/6171933/6176863/06176985.pdf?arnumber=6176985

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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3. The Accelerator Wall: Limits of Chip Specialization;2019 IEEE International Symposium on High Performance Computer Architecture (HPCA);2019-02

4. A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices;IEEE Journal of Solid-State Circuits;2018-08

5. 100x Evolution of Video Codec Chips;Proceedings of the 2017 ACM on International Symposium on Physical Design;2017-03-19

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