Dependence of DC Parameters on Layout and Low-Frequency Noise Behavior in Strained-Si nMOSFETs Fabricated by Stress-Memorization Technique-Reference-Cited by-同舟云学术

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Dependence of DC Parameters on Layout and Low-Frequency Noise Behavior in Strained-Si nMOSFETs Fabricated by Stress-Memorization Technique

Published:2010-05 Issue:5 Volume:31 Page:500-502
ISSN:0741-3106
Container-title:IEEE Electron Device Letters
language:
Short-container-title:IEEE Electron Device Lett.

Author:

Yao-Tsung Huang ,San Lein Wu ,Shoou Jinn Chang ,Cheng Wen Kuo ,Ya Ting Chen ,Yao-Chin Cheng ,Cheng Osbert

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx5/55/5453316/05439695.pdf?arnumber=5439695

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. High-performance sidewall damascened tri-gate poly-si TFTs with the strain proximity free technique and stress memorization technique;Semiconductor Science and Technology;2017-01-09

2. A Stress Concentration MOSFET Structure;IEEE Transactions on Electron Devices;2014-01

3. Low-Frequency Noise Characteristics for Various ${\rm ZrO}_{2}$-Added ${\rm HfO}_{2}$-Based 28-nm High-$k$/Metal-Gate nMOSFETs;IEEE Electron Device Letters;2013-07

4. Characterization of Oxide Traps in 28 nm n-Type Metal–Oxide–Semiconductor Field-Effect Transistors with Different Uniaxial Tensile Stresses Utilizing Random Telegraph Noise;Japanese Journal of Applied Physics;2013-04-01

5. Correlation Between Random Telegraph Noise and $ \hbox{1}/f$ Noise Parameters in 28-nm pMOSFETs With Tip-Shaped SiGe Source/Drain;IEEE Electron Device Letters;2012-07

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