Implementation of Square Root Function Using Vedic Mathematics-Reference-Cited by-同舟云学术

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Implementation of Square Root Function Using Vedic Mathematics

Published:2023-07-06 Issue: Volume: Page:
ISSN:
Container-title:2023 14th International Conference on Computing Communication and Networking Technologies (ICCCNT)
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Author:

Kumari K.L.V Ramana¹,Y Varshitha¹,M Rakesh¹,Ch Gopi¹

Affiliation:

1. VNR Vignana Jyothi Institute of Engineering and Technology,Department of ECE,Hyderabad

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10306338/10306339/10306468.pdf?arnumber=10306468

Reference17 articles.

1. Computational Simulation of Square using Low Power Vedic Algorithm and its Implementation on FPGA

2. Vedic Maths Calculator using VLSI Implementation;singh;International Journal of Research in Engineering Science and Management,2019

3. Design of ASIC Square Calculator Using AncientVedic Mathematics

4. VLSI Design and Implemenation of Binary Number Multiplier based on Urdhva Tiryabhyam Sutra with reduced Delay and Area;rashid;International Journal of Engineering Research and Technology,2013

5. Design and Implementation of high efficiency Vedic Binary Squaring Circuit;chandu;ICSTEM,2017

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Memristor-Based Square Root Computation for Signal Processing Applications;2024 IEEE International Black Sea Conference on Communications and Networking (BlackSeaCom);2024-06-24

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