Benchmarking TFET from a circuit level perspective: Applications and guideline-Reference-Cited by-同舟云学术

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Benchmarking TFET from a circuit level perspective: Applications and guideline

Published:2017-05 Issue: Volume: Page:
ISSN:
Container-title:2017 IEEE International Symposium on Circuits and Systems (ISCAS)
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Author:

Guo Lingyi,Ye Le,Chen Cheng,Huang Qianqian,Yang Libo,Lv Zhu,An Xia,Huang Ru

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8014728/8049747/08051028.pdf?arnumber=8051028

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Capacitance Modeling With Charge Partitions Covering Full-Region Operations of TFETs;IEEE Transactions on Electron Devices;2024-07

2. Investigation of Body Bias Impact in Si/SiGe Heterojunction Line TFETs: A Physical Insight;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21

3. Performance Benchmarking of TFET and FinFET Digital Circuits from a Synthesis-Based Perspective;Electronics;2022-02-18

4. Digital and analog TFET circuits: Design and benchmark;Solid-State Electronics;2018-08

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