CMOS Image Sensor With Micro–Nano Holes to Improve NIR Optical Efficiency: Holes on Top Surface Versus on Bottom-Reference-Cited by-同舟云学术

CMOS Image Sensor With Micro–Nano Holes to Improve NIR Optical Efficiency: Holes on Top Surface Versus on Bottom

Published:2023-09-01 Issue:17 Volume:23 Page:19256-19261
ISSN:1530-437X
Container-title:IEEE Sensors Journal
language:
Short-container-title:IEEE Sensors J.

Author:

Devine Ekaterina Ponizovskaya¹^ORCID,Ahamed Ahasan¹^ORCID,Mayet Ahmed S.¹,Rawat Amita¹,Elrefaie Aly F.²,Yamada Toshishige³,Wang Shih-Yuan²,Islam M. Saif¹^ORCID

Affiliation:

1. Devine is with W&Wsens Device Inc., Los Altos, CA, USA

2. W&Wsens Device Inc., Los Altos, CA, USA

3. Electrical and Computer Engineering, University of California Santa Cruz, Santa Cruz, CA, USA

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Instrumentation

Link

http://xplorestaging.ieee.org/ielx7/7361/10235271/10197347.pdf?arnumber=10197347

Reference16 articles.

1. Deep Trench Isolation for Crosstalk Suppression in Active Pixel Sensors with 1.7 µm Pixel Pitch

2. A Review of 3-Dimensional Wafer Level Stacked Backside Illuminated CMOS Image Sensor Process Technologies

3. Computational Electromagnetics: The Finite-Difference Time-Domain Method

4. A New Paradigm in High-Speed and High-Efficiency Silicon Photodiodes for Communication—Part II: Device and VLSI Integration Challenges for Low-Dimensional Structures

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