Analytical Expressions for Doped Polycrystalline Silicon Thin-Film Transistors in Above-Threshold Regime Consistent With Pao–Sah Model Considering Trapped Charge Effect
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx5/16/6074986/06046119.pdf?arnumber=6046119
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A threshold voltage definition for modeling asymmetric dual-gate amorphous InGaZnO thin-film transistors with parameter extraction technique;Journal of Applied Physics;2019-02-28
2. Anomalous capacitance characteristics of TFTs with LDD structures in the saturation region;Semiconductor Science and Technology;2016-03-29
3. Trapped-Charge-Effect-Based Above-Threshold Current Expressions for Amorphous Silicon TFTs Consistent With Pao–Sah Model;IEEE Transactions on Electron Devices;2014-11
4. Polynomial-Effective-Channel-Mobility-Based Above-Threshold Current Model for Undoped Polycrystalline-Silicon Thin-Film Transistors Consistent With Pao–Sah Model;IEEE Transactions on Electron Devices;2012-11
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