Design of a 1-V operational passive sigma-delta modulator
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx5/5247537/5274921/05275088.pdf?arnumber=5275088
Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Macro Model for Discrete-Time Sigma‒Delta Modulators;Electronics;2022-12-02
2. A Low-Power Third-Order Passive Continuous-Time Sigma-Delta Modulator Using FinFET;Lecture Notes in Electrical Engineering;2020
3. A low power passive-active ΔΣ modulator with high-resolution employing an integrator with open-loop unity-gain buffer;Integration;2019-01
4. Digital Calibration of Memory Errors in Passive Sigma-Delta Modulator;IETE Journal of Research;2018-06-11
5. A low-power parametric integrator for wideband switched-capacitor ΣΔ modulators;Analog Integrated Circuits and Signal Processing;2013-11-24
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