Pixel/DRAM/logic 3-layer stacked CMOS image sensor technology-Reference-Cited by-同舟云学术

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Pixel/DRAM/logic 3-layer stacked CMOS image sensor technology

Published:2017-12 Issue: Volume: Page:
ISSN:
Container-title:2017 IEEE International Electron Devices Meeting (IEDM)
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Author:

Tsugawa H.,Takahashi H.,Nakamura R.,Umebayashi T.,Ogita T.,Okano H.,Iwase K.,Kawashima H.,Yamasaki T.,Yoneyama D.,Hashizume J.,Nakajima T.,Murata K.,Kanaishi Y.,Ikeda K.,Tatani K.,Nagano T.,Nakayama H.,Haruta T.,Nomoto T.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8255107/8268301/08268317.pdf?arnumber=8268317

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