Fully integrated 54nm STT-RAM with the smallest bit cell dimension for high density memory application

Author:

Suock Chung ,Rho K.-M.,Kim S.-D.,Suh H.-J.,Kim D.-J.,Kim H.-J.,Lee S.-H.,Park J.-H.,Hwang H.-M.,Hwang S.-M.,Lee J.-Y.,An Y.-B.,Yi J.-U.,Seo Y.-H.,Jung D.-H.,Lee M.-S.,Cho S.-H.,Kim J.-N.,Park G.-J.,Gyuan Jin ,Driskill-Smith A.,Nikitin V.,Ong A.,Tang X.,Yongki Kim ,Rho J.-S.,Park S.-K.,Chung S.-W.,Jeong J.-G.,Hong S.-J.

Publisher

IEEE

Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Advancements in materials, devices, and integration schemes for a new generation of neuromorphic computers;Materials Today;2022-10

2. Evolving Skyrmion Racetrack Memory as Energy-Efficient Last-Level Cache Devices;ACM/IEEE International Symposium on Low Power Electronics and Design;2022-08

3. Array of symmetric nanohole dimers with high sensitivity for detection of changes in an STT-RAM ultrathin dielectric layer;Journal of the Optical Society of America B;2019-10-22

4. Compression with multi-ECC;Proceedings of the International Symposium on Memory Systems;2019-09-30

5. Magnetic tunnel junctions with perpendicular easy axis at junction diameter of less than 20 nm;Japanese Journal of Applied Physics;2017-07-24

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