A 68 Parallel Row Access Neuromorphic Core with 22K Multi-Level Synapses Based on Logic-Compatible Embedded Flash Memory Technology
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Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/8601505/8614478/08614599.pdf?arnumber=8614599
Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. On-Chip Adaptation for Reducing Mismatch in Analog Non-Volatile Device Based Neural Networks;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
2. eF2lowSim: System-Level Simulator of eFlash-Based Compute-in-Memory Accelerators for Convolutional Neural Networks;2023 Design, Automation & Test in Europe Conference & Exhibition (DATE);2023-04
3. Flash: A “Forgotten” Technology in VLSI Design;Frontiers of Quality Electronic Design (QED);2022-09-06
4. Synaptic Tunnel Field-Effect Transistors for Extremely-Low-Power Operation;IEEE Electron Device Letters;2022-07
5. An Embedded nand Flash-Based Compute-In-Memory Array Demonstrated in a Standard Logic Process;IEEE Journal of Solid-State Circuits;2022-02
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