First demonstration of Ge nanowire CMOS circuits: Lowest SS of 64 mV/dec, highest gmax of 1057 μS/μm in Ge nFETs and highest maximum voltage gain of 54 V/V in Ge CMOS inverters-Reference-Cited by-同舟云学术

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First demonstration of Ge nanowire CMOS circuits: Lowest SS of 64 mV/dec, highest gmax of 1057 μS/μm in Ge nFETs and highest maximum voltage gain of 54 V/V in Ge CMOS inverters

Published:2015-12 Issue: Volume: Page:
ISSN:
Container-title:2015 IEEE International Electron Devices Meeting (IEDM)
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Author:

Wu Heng,Wu Wangran,Si Mengwei,Ye Peide D.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7402013/7409598/07409610.pdf?arnumber=7409610

Cited by 29 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Extremely High-κ Hf_0.2Zr_0.8O₂ Gate Stacks Integrated Into Eight Stacked Ge_0.95Si_0.05 Nanowires and Nanosheets nFETs to Boost I_ON;IEEE Transactions on Electron Devices;2023-12

2. Fabrication and performance of highly stacked GeSi nanowire field effect transistors;Communications Engineering;2023-11-01

3. Vertical GeSn nanowire MOSFETs for CMOS beyond silicon;Communications Engineering;2023-02-25

4. I_ON Enhancement of Ge_0.98Si_0.02 Nanowire nFETs by High-κ Dielectrics;IEEE Electron Device Letters;2022-10

5. Schottky-like barrier characterization of field-effect transistors with multiple quasi-ballistic channels;Journal of Applied Physics;2022-07-14

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