Current Uniformity Optimization of Multi-Chip SiC Module for High-Power Applications
Author:
Affiliation:
1. Fudan University,Academy for Engineering & Technology,Shanghai,China
2. UniSiC Technology (Shanghai) Co., Ltd.,Shanghai,China
3. Philips Healthcare (Suzhou) Co.,Ltd.,Suzhou,China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9958944/9959090/09959680.pdf?arnumber=9959680
Reference14 articles.
1. Dynamic current sharing of multichip SiC module with optimal symmetric layout;weihua;Proceedings of the CSEE,2018
2. Voltage Suppression in Wire-Bond-Based Multichip Phase-Leg SiC MOSFET Module Using Adjacent Decoupling Concept
3. Current-Bunch Concept for Parasitic-Oriented Extraction and Optimization of Multichip SiC Power Module
4. Graph-Model-Based Generative Layout Optimization for Heterogeneous SiC Multichip Power Modules With Reduced and Balanced Parasitic Inductance
5. Optimized power modules for silicon carbide MOSFET
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1. Frequency-domain Thermal Coupling Model of Multi-chip Parallel Power Module;2023 IEEE PELS Students and Young Professionals Symposium (SYPS);2023-08-27
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