Synthesis of SFQ Circuits with Compound Gates

Author:

Bairamkulov Rassul1,Calvino Alessandro Tempia1,De Micheli Giovanni1

Affiliation:

1. EPFL,Integrated Systems Laboratory,Lausanne,Switzerland

Publisher

IEEE

Reference32 articles.

1. QuCTS – single flux Quantum Clock Tree Synthesis

2. Logic-Depth-Aware Technology Mapping Method for RSFQ Logic Circuits With Special RSFQ Gates;kito;IEEE TAS,2021

3. Distributed Self-Clock: A Suitable Architecture for SFQ Circuits

4. Depth-Bounded Graph Partitioning Algorithm and Dual Clocking Method for Realization of Superconducting SFQ Circuits;pasandi;ACM JETC,2020

5. A survey of Boolean matching techniques for library binding

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1. Technology-Aware Logic Synthesis for Superconducting Electronics;2024 Design, Automation & Test in Europe Conference & Exhibition (DATE);2024-03-25

2. Algebraic and Boolean Methods for SFQ Superconducting Circuits;2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC);2024-01-22

3. Towards Multiphase Clocking in Single-Flux Quantum Systems;2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC);2024-01-22

4. Superconductive Electronics: A 25-Year Review [Feature];IEEE Circuits and Systems Magazine;2024

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