Design of low-power and high-performance 10 nm SRAM using Electrostatically doped TMD TFET
Author:
Affiliation:
1. IIT (ISM) Dhanbad,Dept. of Electronics Engineering,Dhanbad,Jharkhand
Funder
DST
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10153534/10153516/10153525.pdf?arnumber=10153525
Reference23 articles.
1. Synthesis, Structure, and Properties of Boron- and Nitrogen-Doped Graphene
2. Correction to "Revision of Tunneling Field-Effect Transistor in Standard CMOS Technologies"
3. Comparative Investigation of Different Doping Techniques in TMD Tunnel FET for Subdeca Nanometer Technology Nodes
4. Investigation on the Effect of Gate Dielectric and Other Device Parameters on Digital Performance of Silicene Nanoribbon Tunnel FET
5. Synthesis of N-Doped Graphene by Chemical Vapor Deposition and Its Electrical Properties
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