A 0.05–6 GHz voltage-mode harmonic rejection mixer with up to 30 dBm in-band IIP3 and 35 dBc HRR in 32 nm SOI CMOS
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Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/7961542/7968986/07969078.pdf?arnumber=7969078
Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Wideband Tunable N-Path Mixer With Calibrated Harmonic Rejection Including the 7th LO Harmonic;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-09
2. A Mixer-First Receiver With On-Demand Passive Harmonic Rejection;IEEE Solid-State Circuits Letters;2024
3. A Wideband Mixer with Adaptive Bias Current Adjustment Function;2023 8th International Conference on Integrated Circuits and Microsystems (ICICM);2023-10-20
4. An 8-30 GHz High-Linearity Harmonic-Rejection Mixer in 45 nm CMOS SOI;IEEE Transactions on Microwave Theory and Techniques;2023
5. Hardware-Limited Task-Based Quantization in Systems;Women in Telecommunications;2023
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