A Framework for Acceleration of CNN Training on Deeply-Pipelined FPGA Clusters with Work and Weight Load Balancing-Reference-Cited by-同舟云学术

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A Framework for Acceleration of CNN Training on Deeply-Pipelined FPGA Clusters with Work and Weight Load Balancing

Published:2018-08 Issue: Volume: Page:
ISSN:
Container-title:2018 28th International Conference on Field Programmable Logic and Applications (FPL)
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Author:

Geng Tong,Wang Tianqi,Sanaullah Ahmed,Yang Chen,Patel Rushi,Herbordt Martin

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8529150/8530786/08533530.pdf?arnumber=8533530

Cited by 37 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A High-Performance and Ultra-Low-Power Accelerator Design for Advanced Deep Learning Algorithms on an FPGA;Electronics;2024-07-08

2. HitGNN: High-Throughput GNN Training Framework on CPU+Multi-FPGA Heterogeneous Platform;IEEE Transactions on Parallel and Distributed Systems;2024-05

3. A Multi-FPGA Implementation of FM-Index Based Genomic Pattern Search;IEICE Transactions on Information and Systems;2023-11-01

4. Hardware–Software Co-design of Deep Neural Architectures: From FPGAs and ASICs to Computing-in-Memories;Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing;2023-10-10

5. Parallel Implementation of CNN on Multi-FPGA Cluster;IEICE Transactions on Information and Systems;2023-07-01

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