A 800 MHz Fully Synthesizable PLL with Calibration-Free Feedforward Noise Cancellation
Author:
Affiliation:
1. University of Michigan,Electrical Engineering and Computer Science,Ann Arbor,United States
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10272029/10272034/10272201.pdf?arnumber=10272201
Reference6 articles.
1. A 0.009 mm2 Wide-Tuning Range Automatically Placed-and-Routed ADPLL in 14-nm FinFET CMOS
2. A ?236.3dB FoM sub-sampling low-jitter supply-robust ring-oscillator PLL for clocking applications with feedforward noise-cancellation;nagam;IEEE Custom Integrated Circuits Conf (CICC),2018
3. Feedforward Phase Noise Cancellation Exploiting a Sub-Sampling Phase Detector
4. A Calibration-Free 800 MHz Fractional-N Digital PLL With Embedded TDC
5. A 90-nm CMOS 5-GHz Ring-Oscillator PLL With Delay-Discriminator-Based Active Phase-Noise Cancellation
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