Evaluating the effectiveness of a software fault-tolerance technique on RISC- and CISC-based architectures-Reference-Cited by-同舟云学术

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Evaluating the effectiveness of a software fault-tolerance technique on RISC- and CISC-based architectures

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Container-title:Proceedings 6th IEEE International On-Line Testing Workshop (Cat. No.PR00646)
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Author:

Rebaudengo M.,Reorda M.S.,Violante M.,Cheynet P.,Nicolescu B.,Velazco R.

Publisher

IEEE Comput. Soc

Link

http://xplorestaging.ieee.org/ielx5/6914/18602/00856606.pdf?arnumber=856606

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Changing Trends in Computer Architecture : A Comprehensive Analysis of ARM and x86 Processors;International Journal of Scientific Research in Computer Science, Engineering and Information Technology;2021-06-20

2. Analyzing the effectiveness of fault hardening procedures;11th IEEE International On-Line Testing Symposium;2005

3. Operating system function reuse to achieve low-cost fault tolerance;Proceedings. 10th IEEE International On-Line Testing Symposium

4. System safety through automatic high-level code transformations: an experimental evaluation;Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001

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